• INTRA PREDICTION
• • Introduction
  • Structure
  • Usage
  • Note
  • Citation

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INTRA PREDICTION

Introduction

In this module, RTL codes for intra prediction are packaged.
The core file is enc_intrapred.v and relevant intra prediction implements are in ipred_xxx.v files.

Structure

The Verilog HDL codes are organized as follows:

• main fucntion

  • enc_intrapred.v: the main module

• mode decision module

  • select_ipm.v: the module for intra mode decision

• intra prediction implements

• ipred_ang.v: the module for angular intra modes

• ipred_dc.v: the module for DC intra mode

• ipred_bi.v: the module for bilinear intra mode

• ipred_plane.v: the module for plane intra mode

• ipred_hor.v: the module for HOR intra mode

• ipred_ver.v: the module for VER intra mode

• other important modules

  • Extract_fea.v: the module for extracting features
  • REGtree_predictv8.v: the regression tree reasoning module

Usage

Examples can be found in the 4-page technical document.

Note

Please note that the released codes are only for non-commercial use. The intellectual property rights about the coding algorithms are protected by AVS standard, and the techniques for optimzed algorithms and hardware implementations are also protected by invention patents. Note that here we only provide a part of the whole project as implementation reference. If you would like to have a cooperation with the coordinator, please contact Prof. Wei GAO via email (gaowei262@pku.edu.cn).

Citation

[1] Wei Gao*, Hang Yuan, Yang Guo, Lvfang Tao, Zhanyuan Cai, Ge Li, “OpenHardwareVC: An Open Source Library for 8K UHD Video Coding Hardware Implementation,” ACM International Conference on Multimedia (ACM MM), 2022.
[2] Zhanyuan Cai, Wei Gao*, "Efficient Fast Algorithm and Parallel Hardware Architecture for Intra Prediction of AVS3," IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, Korea, May 22-28, 2021.

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