• Overall Project Information
• • Contact Information
  • Note
  • Citation
• List of Contributors
• CODING UNIT PARTITION
• • Introduction
  • Structure
  • Usage
  • Note
  • Citation
• INTRA PREDICTION
• • Introduction
  • Structure
  • Usage
  • Note
  • Citation
• TRANSFORM
• • Introduction
  • Structure
  • Usage
  • Note
  • Citation
• ENTROPY ENCODER
• • Introduction
  • Structure
  • Usage
  • Note
  • Citation

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Overall Project Information

Contact Information

For anything about the overall project, the open source library and cooperations, please contact Asst. Prof. Wei GAO.
Contact (Project Leader)：Asst. Prof. Wei GAO (gaowei262@pku.edu.cn), School of Electronic and Computer Engineering, Peking University

Note

Please note that the released codes are only for non-commercial use. The intellectual property rights about the coding algorithms are protected by AVS standard, and the techniques for optimzed algorithms and hardware implementations are also protected by invention patents. Note that here we only provide a part of the whole project as implementation reference. If you would like to have a cooperation with the coordinator, please contact Prof. Wei GAO via email (gaowei262@pku.edu.cn).

Citation

Please also kindly remember to cite the following references in your publications:
References:
[1] Wei Gao*, Hang Yuan, Yang Guo, Lvfang Tao, Zhanyuan Cai, Ge Li, “OpenHardwareVC: An Open Source Library for 8K UHD Video Coding Hardware Implementation,” ACM International Conference on Multimedia (ACM MM), 2022.
[2] Zhanyuan Cai, Wei Gao*, "Efficient Fast Algorithm and Parallel Hardware Architecture for Intra Prediction of AVS3," IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, Korea, May 22-28, 2021.
[3] Yang Guo, Wei Gao*, Siwei Ma, Ge Li, “Accelerating Transform Algorithm Implementation for Efficient Intra Encoder of 8K UHD Videos,” ACM Transactions on Multimedia Computing, Communications, and Applications (TOMM), Volume 18, Issue 4, November 2022.
[4] Lvfang Tao, Wei Gao*, “A Hardware Implementation of Entropy Encoder for 8K Video Coding,” IEEE International Conference on Multimedia and Expo (ICME), 2022.

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List of Contributors

Contributors:
Asst. Prof. Wei Gao (Shenzhen Graduate School, Peking University)
Mr. Hang Yuan (Shenzhen Graduate School, Peking University)
Mr. Yang Guo (Shenzhen Graduate School, Peking University)
Mr. Lvfang Tao (Shenzhen Graduate School, Peking University)
Mr. Zhanyuan Cai (Shenzhen Graduate School, Peking University)
etc.
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CODING UNIT PARTITION

Introduction

In this module, RTL codes for coding unit partition are packaged.
The core file is enc_main_CU_split.v and relevant coding unit partitioning implements are in other xxx.v files.

Structure

The Verilog HDL codes are organized as follows:

• main function

  • enc_main_CU_split.v: the main module

• The histogram and gradient calculation function of SCUs

  • get_gra_tex_sum.v: gradient calculation
  • get_sub_cu_hist_u.v: histogram calculation for Cb
  • get_sub_cu_hist_v.v: histogram calculation for Cc

• mode decision module

  • new_classifier.v: the module for intra mode decision

Usage

Examples can be found in the 4-page technical document.

Note

Please note that the released codes are only for non-commercial use. The intellectual property rights about the coding algorithms are protected by AVS standard, and the techniques for optimzed algorithms and hardware implementations are also protected by invention patents. Note that here we only provide a part of the whole project as implementation reference. If you would like to have a cooperation with the coordinator, please contact Prof. Wei GAO via email (gaowei262@pku.edu.cn).

Citation

[1] Wei Gao*, Hang Yuan, Yang Guo, Lvfang Tao, Zhanyuan Cai, Ge Li, “OpenHardwareVC: An Open Source Library for 8K UHD Video Coding Hardware Implementation,” ACM International Conference on Multimedia (ACM MM), 2022.

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INTRA PREDICTION

Introduction

In this module, RTL codes for intra prediction are packaged.
The core file is enc_intrapred.v and relevant intra prediction implements are in ipred_xxx.v files.

Structure

The Verilog HDL codes are organized as follows:

• main fucntion

  • enc_intrapred.v: the main module

• mode decision module

  • select_ipm.v: the module for intra mode decision

• intra prediction implements

• ipred_ang.v: the module for angular intra modes

• ipred_dc.v: the module for DC intra mode

• ipred_bi.v: the module for bilinear intra mode

• ipred_plane.v: the module for plane intra mode

• ipred_hor.v: the module for HOR intra mode

• ipred_ver.v: the module for VER intra mode

• other important modules

  • Extract_fea.v: the module for extracting features
  • REGtree_predictv8.v: the regression tree reasoning module

Usage

Examples can be found in the 4-page technical document.

Note

Please note that the released codes are only for non-commercial use. The intellectual property rights about the coding algorithms are protected by AVS standard, and the techniques for optimzed algorithms and hardware implementations are also protected by invention patents. Note that here we only provide a part of the whole project as implementation reference. If you would like to have a cooperation with the coordinator, please contact Prof. Wei GAO via email (gaowei262@pku.edu.cn).

Citation

[1] Wei Gao*, Hang Yuan, Yang Guo, Lvfang Tao, Zhanyuan Cai, Ge Li, “OpenHardwareVC: An Open Source Library for 8K UHD Video Coding Hardware Implementation,” ACM International Conference on Multimedia (ACM MM), 2022.
[2] Zhanyuan Cai, Wei Gao*, "Efficient Fast Algorithm and Parallel Hardware Architecture for Intra Prediction of AVS3," IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, Korea, May 22-28, 2021.

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TRANSFORM

Introduction

In this library, RTL codes for TRANSFORM and INVERSE TRANSFORM are packaged.

Structure

The Verilog HDL codes are organized as follows:

• TRANSFORM (TRAN)

  • enc_trans.v: the top-level module

• INVERSE TRANSFORM (ITRAN)

  • com_itrans.v: the top-level module

Usage

Examples can be found in the 4-page technical document.

Note

Please note that the released codes are only for non-commercial use. The intellectual property rights about the coding algorithms are protected by AVS standard, and the techniques for optimzed algorithms and hardware implementations are also protected by invention patents. Note that here we only provide a part of the whole project as implementation reference. If you would like to have a cooperation with the coordinator, please contact Prof. Wei GAO via email (gaowei262@pku.edu.cn).

Citation

[1] Wei Gao*, Hang Yuan, Yang Guo, Lvfang Tao, Zhanyuan Cai, Ge Li, “OpenHardwareVC: An Open Source Library for 8K UHD Video Coding Hardware Implementation,” ACM International Conference on Multimedia (ACM MM), 2022.
[2] Yang Guo, Wei Gao*, Siwei Ma, Ge Li, “Accelerating Transform Algorithm Implementation for Efficient Intra Encoder of 8K UHD Videos,” ACM Transactions on Multimedia Computing, Communications, and Applications (TOMM), Volume 18, Issue 4, November 2022.

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ENTROPY ENCODER

Introduction

In this module, RTL codes for the binarizer (BinEnc) and the main entropy coding engine (BitEnc) are packaged.
Due to IPR-related considerations, code for the binarization process that unrelated to the transform coefficients remain private at the time.

Structure

The Verilog HDL codes are organized as follows:

• BinEnc

  • enc_eco_run_length_cc.v: the top-level module

• BitEnc

• eco_engine_process.v: the top-level module

Usage

Examples can be found in the 4-page technical document.

Note

Please note that the released codes are only for non-commercial use. The intellectual property rights about the coding algorithms are protected by AVS standard, and the techniques for optimzed algorithms and hardware implementations are also protected by invention patents. Note that here we only provide a part of the whole project as implementation reference. If you would like to have a cooperation with the coordinator, please contact Prof. Wei GAO via email (gaowei262@pku.edu.cn).

Citation

[1] Wei Gao*, Hang Yuan, Yang Guo, Lvfang Tao, Zhanyuan Cai, Ge Li, “OpenHardwareVC: An Open Source Library for 8K UHD Video Coding Hardware Implementation,” ACM International Conference on Multimedia (ACM MM), 2022.
[2] Lvfang Tao, Wei Gao*, “A Hardware Implementation of Entropy Encoder for 8K Video Coding,” IEEE International Conference on Multimedia and Expo (ICME), 2022.

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